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System Description of Inverter
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TM-11-6130-377-14 Inverter Power Static PP-7078/U Manual
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Figure 5-2. Inverter drive A1A2 overall block diagram, 1973 model.
TM 11-6130-377-14
at connector P2 pin 9.  Thus, when the photocoupler
through inductor L2.  Inductor L2 controls the rate of
transistor in the master inverter turns on (because the
discharge of the capacitor to allow sufficient time for turn-
shunt trip relay driver operated), the slave inverter +5 vdc
off of SCR Q2 (Q4). Inductor L3 (L5) limits the discharge
is conducted to the base of transistor Q11 (Q22) in the
rate of C2 (C3).
slave inverter, causing the shunt trip relay drivers to
(9)  After capacitor C2 (C3) is discharged from
operate simultaneously. The photocoupler of the slave
220 volts to 0 volt at the anode of Q1 (Q3), it starts to
inverter operates the shunt trips relay driver of the master
charge the anode of Q2 (Q4) to 220 volts. When C2 (C3)
inverter in a similar manner, except that master inverter
is charged to 220 volts because of the phase shift
+5 vdc is obtained at slave inverter connector P2 pin 10.
between voltage and current, the flux at that time in
(a)  Parallel SCR Driver Input.  In this
inductor L2 is at a maximum. The reactive energy stored
in the inductor is transferred to the capacitor and tends to
configuration, connector P2 on the master inverter
cause the capacitor to continue charging past 220 volts.
contains the same jumpers as used for nonparallel
A voltage on the capacitor higher than 220 volts at the
operation, so that the SCR driver is operated from its own
anode of Q2 (Q4), however, would produce a negative
oscillator  and  frequency  divider,  in  addition  to
voltage at the anode of SCR Q1 (Q3) with respect to the
interconnecting wires to the slave inverter. Connector P2
negative terminal of the input power. This condition is
on the slave inverter, however, does not contain jumpers
prevented by clamping diode CR4 (CR6) connected to tap
on its connector P2 pins 7 to 8, 3 to 10, 2 to 11, and 6 to
number 2 on the transformer (oriented close to the anode
12.  Instead, the SCR driver of the slave inverter is
of SCR Q1 (Q3)). As a result, the amount of overcharge
operated from the oscillator and frequency divider of the
of the capacitor is insignificant.  The energy stored in
master inverter through the cable so that both inverters
inductor L2 causes current to flow through diode CR4
are operated in phase with each other. Master inverter
(CR6), transformer winding 2-to-1, and SCR Q1 (Q3).
connector P2 pins 8, 10, 11, and 12 are connected
Transformer windings 2-to-1 and 3-to-2 act as auto-
through the cable to slave inverter connector P2 pins 8,
transformers through which the energy in the inductor is
10, 11, and 12, respectively.
returned to the power input. When the firing current is
(b)  Non-Parallel SCR Driver Input. When
applied to the gate of SCR Q2 (Q4), this device conducts
the inverter is operated as a single unit (nonparallel),
and the process described above for Q1 (Q3) is repeated.
jumpers are connected across connector P2 which plugs
(10) Output transformer T1, capacitor C3 (C4),
into connector J2 (refer to figure FO-1 for electrical
and inductors L4 (L3) and L5 (L4) form a ferroresonant
interconnection configuration). The jumpers in connector
transformer and filter.
Capacitor C3 (C4) is the
P2 are from pins 7 to 8, 3 to 10, 2 to 11, and 6 to 12. No
ferroresonant capacitor and inductors L4 (L3) and L5 (L4)
other connections are made to connector P2 in the non-
suppress harmonics. The low-distortion, sine-wave output
parallel mode of operation. Thus, the SCR driver circuit
is taken from across the secondary winding 7-to-8 of
is operated from its own oscillator and frequency divider.
transformer T1.
5-3. Functional Description of Inverter Drive Circuit
(11) The photocoupler of the master inverter is
Board A1A2 (1973 Model Only)
connected to operate the slave inverter's shunt trip relay
(fig. 5-2 and FO-2)
driver and the photocoupler of the slave inverter is
connected to operate the master inverter's shunt trip relay
a. DC Power Supply Circuit (fig. 5-2 and FO-2). The
driver. This is accomplished by use of the cable between
unit power supply circuit consists of U1 and filter
connector P2 of each inverter drive circuit board (refer to
capacitors C3, C5, C6 and C7 (included in the inverter
FO-1 for electrical interconnection configuration).  The
drive description are basic reference designators which in
collector of the photocoupler transistor of the master
turn apply to inverter drive A1A2). The regulator, which
inverter is connected through connector P2 pin 1 to +5
starts operating when DC input power is first applied to
vdc of the slave inverter to connector P2 pin 3.  The
the system, reduces the +10 to +12 volt input at
emitter of the photocoupler transistor in the master
connector J1 pin 10 to a regulated +5 vdc level that is
inverter is connected through connector P2 pin 4 to shunt
filtered for use by the low-level circuitry of the inverter
trip relay driver transistor Q11 (Q22) of the slave inverter
drive circuit board.
Change 1
5-4

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